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数字设计基础 双语教学版pdf电子书版本下载
- （英）威尔金森著；（英）奎克利增补；江捷注释 著
- 出版社： 北京：机械工业出版社
- ISBN：9787111228387
- 出版时间：2008
- 标注页数：312页
- 文件大小：45MB
- 文件页数：326页
- 主题词：数字电路－电路设计－高等学校－双语教学－教材
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图书目录
1 Digital systems and the representation of information 1
Aims and objectives 1
1.1 The realm of digital systems 1
1.2 Representing numbers in a digital system 5
1.3 Performing arithmetic with binary numbers 11
1.4 Representation of alphanumeric symbols 19
1.5 Digital logic example 20
1.6 Summary 21
1.7 Tutorial questions 22
1.8 Suggested further reading 24
2 Logic gates 25
Aims and objectives 25
2.1 Logic signals 25
2.2 Basic logic functions 26
2.3 Boolean relationships 30
2.4 Universal gates 41
2.5 Other gates 44
2.6 Gate design 47
2.7 Summary 57
2.8 Tutorial questions 57
2.9 Suggested furether reading 60
3 Designing combinational circuits 61
Aims and objectives 61
3.1 Combinational circuits 61
3.2 Implementing Boolean expressions 63
3.3 Alternative implementations 68
3.4 Simplifying logic circuits 71
3.5 MSI combinational logic devices 88
3.6 Summary 99
3.7 Tutorial questions 100
3.8 Suggested further reading 102
4 Flip-flops and counters 103
Aims and objectives 103
4.1 Sequential circuits 103
4.2 Memory design using gates 104
4.3 Flip-flops 106
4.4 Registers 115
4.5 Counters 120
4.6 Summary 131
4.7 Tutorial questions 131
4.8 Suggested further reading 133
5 Sequential circuit design 134
Aims and objectives 134
5.1 Synchronous sequential circuit model 134
5.2 Designing synchronous sequential circuits 136
5.3 Summary 160
5.4 Tutorial questions 160
5.5 Suggested further reading 162
6 Designing with programmable logic devices 163
Aims and objectives 163
6.1 Programmable logic devices(PLDs) 163
6.2 Combinational circuit PLDs 164
6.3 Sequential circuit PLDs 172
6.4 PLD programming tools 177
6.5 Using read-only memories(ROMs) 189
6.6 Summary 192
6.7 Tutorial questions 193
6.8 Suggested further reading 193
7 Testing logic circuits 194
Aims and objectives 194
7.1 The need for testing 194
7.2 Faults and fault models 195
7.3 Generating test vectors for combinational circuits 197
7.4 Testing sequential circuits and complex systems 207
7.5 Summary 210
7.6 Tutorial questions 210
7.7 Suggested further reading 211
8 Motivation for Hardware Description Languages 212
Aims and objectives 212
8.1 Problems with low level methods 212
8.2 Hardware Description Languages 221
8.3 Behavioral and structural description 221
8.4 Synthesis and simulation 223
8.5 Summary 224
8.6 Suggested further reading 225
9 Introduction to VHDL 226
Aims and objectives 226
9.1 A simple example in VHDL 226
9.2 Stylistic issues 229
9.3 The IEEE library 232
9.4 Conditionals in VHDL 233
9.5 Handling signals that are more than 1 bit wide 234
9.6 Summary 241
9.7 Tutorial questions 242
9.8 Suggested further reading 243
10 Behavioral and structural descriptions in VHDL 245
Aims and objectives 245
10.1 An example:an adder 245
10.2 A dataflow description of the full adder 246
10.3 Structural VHDL 249
10.4 Processes 253
10.5 Sequential and concurrent VHDL 258
10.6 Summary 261
10.7 Tutorial questions 261
10.8 Suggested further reading 262
11 VHDL simulation 263
Aims and objectives 263
11.1 Simulation 263
11.2 VHDL simulation of dataflow code 264
11.3 Simulation of structural VHDL 267
11.4 The uninitialized logic value U 268
11.5 Delay modeling 270
11.6 Test benches 272
11.7 Summary 276
11.8 Tutorial questions 276
11.9 Suggested further reading 278
12 Using VHDL to describe systems with a clock 279
Aims and objectives 279
12.1 Defining clocks,flip-flops and registers 279
12.2 Register Transfer Level(RTL)coding 284
12.3 Sequential logic 289
12.4 Summary 294
12.5 Tutorial questions 294
12.6 Suggested further reading 295
Answers to self-assessment questions 296
Index 308