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PART ⅠOVERVIEW 1

Chapter 1 Introduction 3

1．1 Organization and Architecture 5

1．2 Structure and Function 6

1．3 Outline of the Book 12

1．4 Internet and Web Resources 15

Chapter 2 computer Evolution and Performance 17

2．1 A Brief History of Computers 19

2．2 Designing for Performance 39

2．3 Pentium and PowerPC Evolution 43

2．4 Recommended Reading and Web Sites 46

2．5 Problems 47

PART Ⅱ THE COMPUTER SYSTEM 49

Chapter 3 System Buses 51

3．1 Computer Components 53

3．2 Computer Function 56

3．3 Interconnection Structures 69

3．4 Bus Interconnection 71

3．5 PCI 80

3．6 Recommended Reading and Web Sites 89

3．7 Problems 90

Appendix 3A：Timing Diagrams 92

Chapter 4 Internal Memory 95

4．1 Computer Memory System Overview 97

4．2 Semiconductor Main Memory 103

4．3 Cache Memory 117

4．4 Pentium Ⅱ and PowerPC Cache organization 132

4．5 Advanced DRAM Organization 137

4．6 Recommended Reading and Web Sites 142

4．7 Problems 143

Appendix 4A：Performance Characteristics of Two-Level Memories 145

Chapter 5 External Memory 153

5．1 Magnetic Disk 155

5．2 RAID 163

5．3 Optical Memory 172

5．4 Magfletic Tape 177

5．5 Recommended Reading and Web Sites 178

5．6 Problems 179

Chapter 6 Input/Output 181

6．1 External Devices 184

6．2 I/O Modules 188

6．3 Programmed I/O 191

6．4 Interrupt-Driven I/O 195

6．5 Direct Memory Access 203

6．6 I/O Channels and processors 207

6．7 The External Interface：SCSI and Fire Wire 209

6．8 Recommended Reading and Web Sites 223

6．9 Problems 224

Chapter 7 Operating System Support 227

7．1 Operating System Overview 229

7．2 Scheduling 241

7．3 Memory Management 247

7．4 Pentium Ⅱ and PowerPC Memory Management 259

7．5 Recommended Reading and Web Sites 268

7．6 Problems 269

PART Ⅲ THE CENTRAL PROCESSING UNIT 271

Chapter 8 Computer Arithmetic 273

8．1 The Arithmetic and Logic Unit（ALU） 275

8．2 Integer Representation 276

8．3 Integer Arithmetic 282

8．4 Floating-Point Representation 298

8．5 Floating-Point Arithmetic 305

8．6 Recommended Reading and Web Sites 314

8．7 Problems 315

Appendix 8A：Number Systems 317

Chapter 9 Instruction Sats：Characteristics and Functions 323

9．1 Machine Instruction Characteristics 325

9．2 Types of Operands 331

9．3 Pentium Ⅱ and PowerPC Data Types 333

9．4 Types of Operations 336

9．5 Pentium Ⅱ and PowerPC Operation Types 349

9．6 Assembly Language 358

9．7 Recommended Reading 360

9．8 Problems 360

Appendix 9A：Stacks 364

Appendix 9B：Little-，Big-，and Bi-Endian 368

Chapter 10 Instruction Sets：Addressing Modes and Formats 373

10．1 Addressing 375

10．2 Pentium and PowerPC Addressing Modes 382

10．3 Instruction Pormats 388

10．4 Pentium and PowerPC Instruction Formats 397

10．5 Recommended Reading 402

10．6 Problems 402

Chapter 11 CPU Structure and Function 405

11．1 Processor Organization 407

11．2 Register Organization 409

11．3 The Instruction Cycle 414

11．4 Instruction Pipelining 419

11．5 The Pentium Processor 434

11．6 The PowerPC Processor 443

11．7 Recommended Reading 450

11．8 Problems 451

Chapter 12 Reduced Instruction Set Computers 455

12．1 Instruction Execution Characteristics 458

12．2 The Use of a Large Register File 462

12．3 Compiler-Based Register Optimization 467

12．4 Reduced Instruction Set Architecture 469

12．5 RISC Pipelining 476

12．6 MIPS R4000 480

12．7 SPARC 488

12．8 The RISC versus CISC Controversy 494

12．9 Recommended Reading 495

12．10 Problems 496

Chapter 13 Instruction-Level Parallelism and Superscalar Processors 499

13．1 Overview 501

13．2 Design Issues 506

13．3 Pentium Ⅱ 515

13．4 PowerPC 521

13．5 MIPS R10000 529

13．6 UltraSPARC-Ⅱ 531

13．7 IA-64/Merced 534

13．8 Recommended Reading 545

13．9 Problems 546

PART Ⅳ THE CONTROL UNIT 551

Chapter 14 Control Unit Operation 553

14．1 Micro-operations 555

14．2 Control of the Processor 561

14．3 Hardwired Implementation 573

14．4 Recommended Reading 575

14．5 Problems 576

Chapter 15 Microprogrammed Control 577

15．1 Basic Concepts 579

15．2 Microinstruction Sequencing 588

15．3 Microinstruction Execution 593

15．4 TI8800 605

15．5 Applications of Microprogramming 615

15．6 Recommended Reading 616

15．7 Problems 617

PART Ⅴ PARALLEL ORGANIZATION 619

Chapter 16 Parallel Processing 621

16．1 Multiple Processor Organizations 623

16．2 Symmetric Multiprocessors 625

16．3 Cache Coherence and the MESI Protocol 635

16．4 Clusters 642

16．5 Nonuniform Memory Access 646

16．6 Vector Computation 650

16．7 Recommended Reading 663

16．8 Problems 664

Appendix A Digital Logic 669

A．1 Boolean Algebra 670

A．2 Gates 672

A．3 Combinational Circuits 675

A．4 Sequential Circuits 696

A．5 Problems 707

Appendix B Projects for Teaching Computer Organization and Architecture 709

B．1 Research projects 710

B．2 Simulation Projects 710

B．3 Reading/Report Assignments 712

Glossary 713

References 725

Index 739